This invention relates to an output driver circuit for use on large scale integration (LSI) and very large scale integration (VLSI) emitter coupled logic (ECL) circuit chips. More particularly, the invention relates to an ECL output driver circuit which converts logic levels to agree with those of the circuit being driven, is temperature compensated and has an active pulldown.
ECL logic circuits are commonly used in the prior art. FIG. 1 is a schematic diagram of one such circuit which is manufactured by Motorola Semiconductor Products, Incorporated, of Phoenix, Ariz. and is one of their Motorola Emitter Coupled Logic (MECL) line of products.
The theory of operation of ECL logic circuits is well understood in the art and will only be explained briefly here. Referring to FIG. 1, the circuit chosen for the explanation is an OR/NOR gate. The circuit has a multiplicity of inputs 10, consisting of inputs A, B and C connected to the transistors, Q1, A2 and Q3, respectively. A differential amplifier 11 is formed by the resistors R1-R3, transistor Q4 and any one or all of the transistors Q1, Q2 or Q3.
A reference circuit 12, consisting of resistors R4-R6, transistor Q5 and diodes CR1-CR2, generates a reference voltage at the emitter of transistor Q5, which is connected to the base of transistor Q4. This reference voltage establishes the switching level of the differential amplifier 11. The diodes CR1-CR2 are temperature compensating elements which cause the reference voltage to remain relatively constant with temperature changes.
When all of the inputs A, B and C are at a low logic level, the transistors Q1, Q2 and Q3 will be off and transistor Q4 will be on. The output signals of the differential amplifier 11, the voltages across resistors R1 and R2, are connected to the bases of the emitter follower outputs 13, transistors Q7 and Q6, respectively. The emitter of transistor Q6, the OR output 14, is at a low logic level and the emitter of transistor Q7, the NOR output 15, is at a high logic level.
If any of the inputs A, B or C should change to a high logic level, the state of the differential amplifier 11 will switch. That is, transistor Q4 will turn off and the transistor whose input is high, i.e., Q1, Q2 or Q3, will be turned on. This causes the OR output 14 to switch from a low logic level to a high logic level and the NOR output 15 to switch from a high logic level to a low logic level.
One of the advantages of ECL logic circuits is their fast switching speeds, that is, the time it takes the outputs 14-15 to switch from one logic level to the other. This time is on the order of a nanosecond. This means that interconnections between circuits that are only a few inches long, depending upon the switching time, will act as transmission lines. When this is the case, the transmission line must be terminated in its characteristic impedance with an external resistor to avoid signal reflections on the line.
The circuit shown in FIG. 1 is merely typical of the type of ECL circuits used in small scale integration (SSI) and medium scale integration (MSI) chips. Many variations of the circuit exist. However, the ECL circuits of the prior art did establish some "standards". These so-called standards are shown in TABLE I, below:
TABLE I ______________________________________ OPERATING VOLTAGE -5.20 VOLTS HIGH LOGIC LEVEL -0.85 VOLTS REFERENCE VOLTAGE -1.30 VOLTS LOW LOGIC LEVEL -1.70 VOLTS LOGIC SWING 0.85 VOLTS TRANSMISSION LINE IMPEDANCE 50 OHMS TERMINATING RESISTANCE 50 OHMS TERMINATING VOLTAGE -2 VOLTS ______________________________________
As ECL technology increased to LSI and VLSI, the individual circuit elements became smaller and more circuits were used on a chip. The combination of these two factors require that the power dissipated by the circuits be decreased. This was typically done by using a lower operating voltage, a lower reference voltage and a smaller logic swing. Disadvantageously, these changes do not allow the LSI and VLSI ECL circuits to be connected directly to SSI and MSI ECL circuits. Some special driver circuit which converts the reference level and the amount of logic swing of the LSI or VLSI ECL circuit is required.
In SSI and MSI ECL, an output circuit which drives a line terminated with 50 ohms connected to -2.0 volts dissipates approximately 50 milliwatts. The transistor used as the emitter follower output must be physically large enough to source the current and dissipate the power required. Unfortunately, an LSI or VSLI chip can have tens to hundreds of outputs and if each had to drive a 50 ohm terminator, the amount of area used on the chip for the emitter follower transistors and the total power dissipated would both be unacceptable.
It is evident from the above discussion that a need exists in the art for an output driver for LSI and VLSI ECL chips that converts the voltage levels used on the chip to levels which are used by other ECL circuits and does not dissipate a large amount of power.